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	<title>SBus - Revision history</title>
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	<updated>2026-05-03T22:48:11Z</updated>
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		<id>https://rs-485.com/index.php?title=SBus&amp;diff=871&amp;oldid=prev</id>
		<title>RS-485: Imported from Wikipedia (overwrite)</title>
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		<updated>2026-05-03T07:24:27Z</updated>

		<summary type="html">&lt;p&gt;Imported from Wikipedia (overwrite)&lt;/p&gt;
&lt;p&gt;&lt;b&gt;New page&lt;/b&gt;&lt;/p&gt;&lt;div&gt;{{Short description|Computer bus system}}&lt;br /&gt;
{{redir|SBUS|the former US national bank|Second Bank of the United States}}&lt;br /&gt;
&lt;br /&gt;
{{Infobox Computer Hardware Bus&lt;br /&gt;
| name        = SBus&lt;br /&gt;
| image       = Sbus_slots.jpg&lt;br /&gt;
| caption     = Four SBus connectors (top of photograph)&lt;br /&gt;
| invent-date = {{Start date and age|1989}}&lt;br /&gt;
| invent-name = [[Sun Microsystems]]&lt;br /&gt;
| super-name  = [[Peripheral Component Interconnect|PCI]]&lt;br /&gt;
| super-date  = 1997&lt;br /&gt;
| width       = 32&lt;br /&gt;
| numdev      = 8 masters, unlimited slaves&lt;br /&gt;
| speed       = 16.67 MHz - 25 MHz&lt;br /&gt;
| style       = p&lt;br /&gt;
}}&lt;br /&gt;
[[Image:Sbus cards.jpg|thumb|right|Two SBus cards]]&lt;br /&gt;
[[Image:Sbus male connector.jpg|thumb|right |upright=1.8 |SBus male connector]]&lt;br /&gt;
&amp;#039;&amp;#039;&amp;#039;SBus&amp;#039;&amp;#039;&amp;#039; is a [[computer bus]] system that was used in most [[SPARC]]-based computers (including all [[SPARCstation]]s) from [[Sun Microsystems]] and others during the 1990s. It was introduced by Sun in 1989 to be a high-speed bus counterpart to their high-speed SPARC processors, replacing the earlier (and by this time, outdated) [[VMEbus]] used in their [[Motorola]] [[68020]]- and [[68030]]-based systems and early SPARC boxes. When Sun moved to open the SPARC definition in the early 1990s, SBus was likewise standardized and became IEEE-1496. In 1997 Sun started to migrate away from SBus to the [[Peripheral Component Interconnect]] (PCI) bus, and today SBus is no longer used.&amp;lt;ref name=&amp;quot;pci&amp;quot;&amp;gt;{{cite web |title= PCI:SBus Comparison |publisher= Sun Microsystems |date= March 1999 |url= https://download.oracle.com/docs/cd/E19620-01/805-7410-10/805-7410-10.pdf |access-date= May 25, 2011 }}&amp;lt;/ref&amp;gt;&lt;br /&gt;
&lt;br /&gt;
The industry&amp;#039;s first third-party SBus cards were announced in 1989 by Antares Microsystems; these were a [[10BASE2]] Ethernet controller, a SCSI-SNS host adapter, a parallel port, and an 8-channel serial controller.&lt;br /&gt;
&lt;br /&gt;
The specification was published by Edward H. Frank and James D. Lyle.&amp;lt;ref name=&amp;quot;pci&amp;quot;/&amp;gt;&lt;br /&gt;
A technical guide to the bus was published in 1992 in book form by Lyle,&amp;lt;ref&amp;gt;{{cite book |title= SBus Information Applications and Experience |author= James D. Lyle |publisher= Springer-Verlag |year= 1992 |isbn= 978-0-387-97862-8 |url-access= registration |url= https://archive.org/details/sbusinformationa00lyle_0 }}&amp;lt;/ref&amp;gt; who founded Troubador Technologies. Sun also published a set of books as a &amp;quot;developer&amp;#039;s kit&amp;quot; to encourage third-party products.&amp;lt;ref&amp;gt;{{cite book |title= SBus handbook |author= Susan A. Mason |publisher= Sun Microsystems |year= 1994 |isbn= 978-0-13-107210-7 }}&amp;lt;/ref&amp;gt;&lt;br /&gt;
&lt;br /&gt;
At the peak of the market over 250 manufacturers were listed in the SBus Product Directory, which was renamed to the SPARC Product Directory in 1996.&lt;br /&gt;
&lt;br /&gt;
SBus is in many ways a &amp;quot;clean&amp;quot; design. It was targeted only to be used with SPARC processors, so most cross-platform issues were not a consideration. SBus is based on a [[big-endian]] [[32-bit]] address and data bus, can run at speeds ranging from 16.67&amp;amp;nbsp;MHz to 25&amp;amp;nbsp;MHz, and is capable of transferring up to 100 MB/s. Devices are each mapped onto a 28-bit address space (256 MB). Only eight masters are supported, although there can be an unlimited number of slaves.&lt;br /&gt;
&lt;br /&gt;
When the [[64-bit]] [[UltraSPARC]] was introduced, SBus was modified to support extended transfers of a 64 bits doubleword per cycle to produce a 200 MB/s 64-bit bus. This variant of the SBus architecture used the same form factor and was backward-compatible with existing devices, as extended transfers are an optional feature.&lt;br /&gt;
&lt;br /&gt;
SBus cards had a very compact form factor for the time. A single-width card was {{convert |83.82 |mm}} wide by {{convert |146.7 |mm}} long and is designed to be mounted parallel to the motherboard.  This allowed for three expansion slots in the slim &amp;quot;[[pizza box form factor|pizza box]]&amp;quot; enclosure of the [[SPARCstation 1]].&amp;lt;ref&amp;gt;{{cite book |doi= 10.1109/CMPCON.1990.63671|chapter= Sun&amp;#039;s SPARCstation 1: A workstation for the 1990s|title= Digest of Papers Compcon Spring &amp;#039;90. Thirty-Fifth IEEE Computer Society International Conference on Intellectual Leverage|pages= 184–188|year= 1990|last1= Bechtolsheim|first1= A.V.|last2= Frank|first2= E.H.|isbn= 0-8186-2028-5|s2cid= 20894045}}&amp;lt;/ref&amp;gt;  The design also allows for double- or triple-width cards that take up two or three slots, as well as double-height (two 3x5 inch boards mounted in a &amp;quot;sandwich&amp;quot; configuration) cards.&lt;br /&gt;
&lt;br /&gt;
SBus was originally announced as both a [[system bus]] and a peripheral interconnect that allowed input and output devices relatively low latency access to memory.&amp;lt;ref&amp;gt;{{cite book |doi= 10.1109/CMPCON.1990.63672|chapter= The SBus: Sun&amp;#039;s high performance system bus for RISC workstations|title= Digest of Papers Compcon Spring &amp;#039;90. Thirty-Fifth IEEE Computer Society International Conference on Intellectual Leverage|pages= 189–194|year= 1990|last1= Frank|first1= E.H.|isbn= 0-8186-2028-5|s2cid= 25815415}}&amp;lt;/ref&amp;gt; However, soon memory and [[central processing unit]] (CPU) speeds outpaced I/O performance. Within a year some Sun systems used [[MBus (SPARC)|MBus]], another interconnection standard, as a CPU—memory bus. The SBus served as an input/output bus for the rest of its lifetime.&lt;br /&gt;
&lt;br /&gt;
==See also==&lt;br /&gt;
*[[List of device bandwidths]]&lt;br /&gt;
&lt;br /&gt;
==References==&lt;br /&gt;
{{Reflist}}&lt;br /&gt;
&lt;br /&gt;
==External links==&lt;br /&gt;
* {{web archive|url=https://web.archive.org/web/19970803133701/http://www.sun.com/pci/sbus.solutions.html|title=Official website}}&lt;br /&gt;
* [http://bitsavers.informatik.uni-stuttgart.de/pdf/sun/sparc/800-5922-10_SBus_Specification_B.0_Dec90.pdf SBus Specification at Bitsavers]&lt;br /&gt;
* [https://ieeexplore.ieee.org/document/8572657 15205-2000 - ISO/IEC 15205:2000 (IEEE Std 1496-1993) SBus -- Chip and Module Interconnect Bus]&lt;br /&gt;
&lt;br /&gt;
{{Computer-bus}}&lt;br /&gt;
{{Sun Microsystems}}&lt;br /&gt;
&lt;br /&gt;
{{Authority control}}&lt;br /&gt;
[[Category:Computer buses]]&lt;br /&gt;
[[Category:Sun Microsystems hardware]]&lt;br /&gt;
[[Category:Motherboard expansion slot]]&lt;br /&gt;
[[Category:Computer-related introductions in 1989]]&lt;/div&gt;</summary>
		<author><name>RS-485</name></author>
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