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{{Short description|Class of digital integrated circuits}}
'''Low voltage complementary metal oxide semiconductor''' ('''LVCMOS''') is a low voltage class of [[CMOS]] technology digital [[integrated circuits]].

To obtain better performance and lower costs, semiconductor manufacturers reduce the device geometries of integrated circuits. With each reduction the associated operating voltage must also be reduced in order to maintain the same basic operational characteristics of the transistors. As semiconductor technology has progressed, LVCMOS power supply voltage and interface standards for decreasing voltages have been defined by the [[Joint Electron Device Engineering Council]] ([[JEDEC]]) for digital logic levels lower than 5 [[volts]].

The original LVCMOS standard of 3.3 V was established in the early 1970s. The CMOS technology of that time could only reliably work at a voltage above 3 V and 3.3 V is already an available [[Voltage reference|voltage regulator standard]] (seen on e.g. the [[Apollo Guidance Computer]]).<ref>{{cite web |last1=Müller |first1=Marcus |title=Why should we use 3.3 V instead of 3 V? |url=https://electronics.stackexchange.com/a/544430 |website=Electrical Engineering Stack Exchange |language=en}}</ref> The JEDEC standard was established in 1994.<ref>{{cite web |last1=Standard of Japan Electronics and Information Technology Industries Association |title=3.3V±0.3V (Normal Range), and 2.7V to 3.6V (Wide Range) Power Supply Voltage and Interface Standard for Nonterminated Digital Integrated Circuit |url=https://home.jeita.or.jp/tsc/std-pdf/ED5001A.pdf}}</ref>

{| class="wikitable" style="text-align: center;"
|-
! Logic level,<br>[[volt]]s!! Tolerance,<br>volts !! Tolerance,<br>percent !! References<br>and notes
|-
| 5.0 V || +/-0.5 V || +/-10.0% || [[Transistor–transistor logic|TTL]] logic, not LVCMOS
|-
| 3.3 V || +/-0.3 V || +/-9.09% || JESD8C.01<ref name="3.3V-spec1"/>
|-
| 2.5 V || +/-0.2 V || +/-8.00% || JESD8-5A.01<ref name="2.5V-spec1"/> JESD80<ref name="2.5V-spec2"/>
|-
| 1.8 V || +/-0.15 V || +/-8.33% || JESD8-7A<ref name="1.8V-spec1"/> JESD76<ref name="1.8V-spec2"/>
|-
| 1.5 V || +/-0.1 V || +/-8.33% || JESD8-11A.01<ref name="1.5V-spec1"/> JESD76-3<ref name="1.5V-spec2"/>
|-
| 1.2 V || +/-0.1 V || +/-8.33% || JESD8-12A.01<ref name="1.2V-spec1"/> JESD76-2<ref name="1.2V-spec2"/>
|-
| 1.0 V || +/-0.1 V || +/-8.33% || JESD8-14A.01<ref name="1.0V-spec1"/>
|-
| 0.9 V || +/-0.045 V || +/-5.00% ||
|-
| 0.8 V || +/-0.04 V || +/-5.00% ||
|-
| 0.7 V || +/-0.05 V || +/-7.14% ||
|}

==References==
{{Reflist|30em|refs=

<ref name="3.3V-spec1">{{cite web |title=JEDEC Standard JESD8C.01 — Interface Standard for 3.3V (Normal Range) Power Supply Voltage for Nonterminated Digital Integrated Circuits |url=https://www.jedec.org/system/files/docs/JESD8C-01.pdf |date=September 2007 |website=[[JEDEC]] |accessdate=March 5, 2019 }}</ref>
<ref name="2.5V-spec1">{{cite web |title=JEDEC Standard JESD8-5A.01 — Interface Standard for 2.5V (Normal Range) Power Supply Voltage for Nonterminated Digital Integrated Circuits |url=https://www.jedec.org/system/files/docs/JESD8-5A-01.pdf |date=September 2007 |website=[[JEDEC]] |accessdate=March 5, 2019 }}</ref>
<ref name="1.8V-spec1">{{cite web |title=JEDEC Standard JESD8-7A — Interface Standard for 1.8V (Normal Range) Power Supply Voltage for Nonterminated Digital Integrated Circuits |url=https://www.jedec.org/system/files/docs/JESD8-7A.pdf |date=September 2007 |website=[[JEDEC]] |accessdate=March 5, 2019 }}</ref>
<ref name="1.5V-spec1">{{cite web |title=JEDEC Standard JESD8-11A.01 — Interface Standard for 1.5V (Normal Range) Power Supply Voltage for Nonterminated Digital Integrated Circuits |url=https://www.jedec.org/system/files/docs/JESD8-11A-01.pdf |date=September 2007 |website=[[JEDEC]] |accessdate=March 5, 2019 }}</ref>
<ref name="1.2V-spec1">{{cite web |title=JEDEC Standard JESD8-12A.01 — Interface Standard for 1.2V (Normal Range) Power Supply Voltage for Nonterminated Digital Integrated Circuits |url=https://www.jedec.org/system/files/docs/jesd8-12A-01.pdf |date=September 2007 |website=[[JEDEC]] |accessdate=March 5, 2019 }}</ref>
<ref name="1.0V-spec1">{{cite web |title=JEDEC Standard JESD8-14A.01 — Interface Standard for 1.0V (Normal Range) Power Supply Voltage for Nonterminated Digital Integrated Circuits |url=https://www.jedec.org/system/files/docs/JESD8-14A-01.pdf |date=September 2007 |website=[[JEDEC]] |accessdate=March 5, 2019 }}</ref>

<ref name="2.5V-spec2">{{cite web |title=JEDEC Standard JESD80 — Standard for Description of 2.5V CMOS Logic Devices |url=https://www.jedec.org/system/files/docs/jesd80.pdf |date=November 1999 |website=[[JEDEC]] |accessdate=March 5, 2019 }}</ref>
<ref name="1.8V-spec2">{{cite web |title=JEDEC Standard JESD76 — Standard for Description of 1.8V CMOS Logic Devices |url=https://www.jedec.org/system/files/docs/JESD76.pdf |date=April 2000 |website=[[JEDEC]] |accessdate=March 5, 2019 }}</ref>
<ref name="1.5V-spec2">{{cite web |title=JEDEC Standard JESD76-3 — Standard for Description of 1.5V CMOS Logic Devices |url=https://www.jedec.org/system/files/docs/jesd76-3.pdf |date=August 2001 |website=[[JEDEC]] |accessdate=March 5, 2019 }}</ref>
<ref name="1.2V-spec2">{{cite web |title=JEDEC Standard JESD76-2 — Standard for Description of 1.2V CMOS Logic Devices |url=https://www.jedec.org/system/files/docs/JESD76-2.pdf |date=June 2001 |website=[[JEDEC]] |accessdate=March 5, 2019 }}</ref>

}}

[[Category:JEDEC standards]]
[[Category:Logic families]]

LVCMOS - Revision history

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