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Imported from Wikipedia (overwrite)

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{{Short description|Computer network protocol}}
{{More citations needed|date=January 2008}}
{{Use dmy dates|date=April 2024}}
'''FlexRay''' is an [[Vehicle bus|automotive network communications protocol]] developed by the '''FlexRay Consortium''' to govern on-board automotive computing. It is designed to be faster and more reliable than [[Controller Area Network|CAN]] and [[Time-Triggered Protocol|TTP]], but it is also more expensive. The FlexRay consortium disbanded in 2009, but the FlexRay standard is now a set of ISO standards, ISO 17458-1<ref>[http://www.iso.org/iso/home/store/catalogue_tc/catalogue_detail.htm?csnumber=59804 ISO 17458-1]</ref> to 17458-5.<ref> [http://www.iso.org/iso/home/store/catalogue_tc/catalogue_detail.htm?csnumber=59809 ISO 17458-5]</ref><ref>{{cite web |url=http://www.hanser-automotive.de/fileadmin/heftarchiv/FLEX_10_ONL_NXP-Y.pdf |title=The FlexRay Electrical Physical Layer Evolution |work=Automotive 2010 |author-last=Lorenz |author-first=Steffen |date=2010 |access-date=16 February 2015 |url-status=dead |archive-url=https://web.archive.org/web/20150216112537/http://www.hanser-automotive.de/fileadmin/heftarchiv/FLEX_10_ONL_NXP-Y.pdf |archive-date=16 February 2015}}</ref>

FlexRay is a communication bus designed to ensure high data rates, fault tolerance, operating on a time cycle, split into static and dynamic segments for event-triggered and time-triggered communications. It is mainly used in aeronautic and automotive sectors.

==Features==
FlexRay supports data rates up to {{nowrap|10 [[megabit|Mbit/s]]}}, explicitly supports both star and bus physical topologies, and can have two independent data channels for fault-tolerance (communication can continue with reduced bandwidth if one channel is inoperative). The bus operates on a time cycle, divided into two parts: the static segment and the dynamic segment. The static segment is preallocated into slices for individual communication types, providing stronger determinism than its predecessor [[Controller Area Network|CAN]]. The dynamic segment operates more like CAN, with nodes taking control of the bus as available, allowing event-triggered behavior.<ref>{{cite web |url=http://cache.freescale.com/files/abstract/overview_applications/FRWORKS.html |title=How FlexRay Works |access-date=21 March 2014 |publisher=Freescale Semiconductor |url-status=dead |archive-url=https://web.archive.org/web/20150223081221/http://cache.freescale.com/files/abstract/overview_applications/FRWORKS.html |archive-date=23 February 2015}}</ref>

==Consortium==
The FlexRay Consortium was made up of the following core members:
* [[Freescale Semiconductor]]
* [[Robert Bosch GmbH|Bosch]]
* [[NXP Semiconductors]]
* [[BMW]]
* [[Volkswagen Group|Volkswagen]]
* [[Daimler AG|Daimler]]
* [[General Motors]]

There were also Premium Associate and Associate members of FlexRay consortium. By September 2009, there were 28 premium associate members and more than 60 associate members. At the end of 2009, the consortium disbanded.

==Commercial deployment ==
The first series production vehicle with FlexRay was at the end of 2006 in the [[BMW X5 (E70)]],<ref name=":0">{{Cite book |url=https://books.google.com/books?id=08ueBQAAQBAJ&pg=PA61|title=Communication in Transportation Systems |author-last=Strobel |author-first=Otto |date=2013-02-28 |publisher=IGI Global |isbn=978-1-46662977-6 |pages=61 |language=en}}</ref> enabling a new and fast adaptive damping system. Full use of FlexRay was introduced in 2008 in the new [[BMW 7 Series (F01)]].

=== Vehicles ===
*[[Audi A4|Audi A4 (B9)]] (2015–)<ref>{{Cite web |url=https://www.audi-mediacenter.com:443/en/high-tech-all-the-way-the-new-audi-a4-and-a4-avant-4328/the-driver-assistance-systems-and-integrated-safety-4332 |title=The driver assistance systems and integrated safety |website=Audi MediaCenter |language=en |access-date=2019-02-21}}</ref>
*[[Audi A5|Audi A5 (F5)]] (2016–)<ref>{{Cite web |url=https://www.audi-mediacenter.com:443/en/the-new-audi-a5-and-audi-s5-coupe-6269/driver-assistance-systems-6281 |title=Driver assistance systems |website=Audi MediaCenter |language=en |access-date=2019-02-21}}</ref>
*[[Audi A6 C7|Audi A6 (C7)]] (2011–2018)<ref>{{cite journal |title=Intelligent electrics / electronics architecture |author-last1=Regler |author-first1=Richard |author-last2=Schlinkheider |author-first2=Jörg |author-last3=Maier |author-first3=Markus |author-last4=Prechler |author-first4=Reinhard |author-last5=Berger |author-first5=Eduard |author-last6=Pröll |author-first6=Leo |journal=ATZextra Worldwide |volume=15 |issue=11 |pages=246–251 |date=2011 |doi=10.1365/s40111-010-0269-9 |s2cid=107330814}}</ref>
*[[Audi A7]]
*[[Audi A8 D4|Audi A8 (D4)]] (2010–2017)<ref>{{Cite web |url=https://www.audi-technology-portal.de/en/electrics-electronics/controls/networking |title=Audi Technology Portal - Networking |website=Audi Technology Portal |language=en |access-date=2019-02-21}}</ref>
*[[Audi_Q7#Second_generation_(Typ_4M;_2015)|Audi Q7]] (2015–)
*[[Audi TT Mk3]] (2014–2023)
*[[Audi_R8#Second_generation_(2015–present:_Type_4S)|Audi R8]] (2015–2023)
*[[Bentley_Flying_Spur_(2005)#Second_generation_(2013–2019)|Bentley Flying Spur]] (2013-2019)
*[[Bentley Mulsanne (2010)|Bentley Mulsanne]] (2010–2020)<ref name=":0" />
*[[BMW X5|BMW X5 (E70)]] (2006–2013)<ref name=":0" />
*[[BMW X6|BMW X6 (E71)]] (2008–2014)<ref>{{Cite web |url=https://www.press.bmwgroup.com/global/article/attachment/T0074093EN/110912 |title=The BMW X6 |website=BMW Press Portal |access-date=2019-03-08}}</ref>
*[[BMW F20|BMW 1 Series]]
*[[BMW F30|BMW 3 Series]]
*[[BMW 5 Series (F10)|BMW 5 Series]] (2009–2017)<ref name=":0" />
*[[BMW 6 Series]] (2011–2018)<ref>{{Cite web |url=https://www.press.bmwgroup.com/global/article/attachment/T0089173EN/182586 |title=The new BMW 6 Series Convertible |website=BMW Press Portal |page=32 |access-date=2019-03-08}}</ref>
*[[BMW F01|BMW 7 Series]] (2008–2015)<ref name=":0" />
*[[Lamborghini Huracán]]
*[[Mercedes-Benz S-Class (W222)]] (2013–2020)<ref>{{Cite web |url=https://media.daimler.com/marsMediaSite/de/instance/print/2322446-83-Fahrwerk-S-Klasse-endoc.xhtml?oid=9259968 |title=2322446_83_Fahrwerk_S_Klasse_en.doc |website=marsMediaSite |language=de |access-date=2019-03-08}}</ref>
*[[Mercedes-Benz S-Class (C217)]] (2014–2020)<ref>{{Cite web |url=https://media.daimler.com/marsMediaSite/de/instance/print/2480996-PI-Kurvenneigung-C217-ENGdocx.xhtml?oid=9082160 |title=2480996_PI_Kurvenneigung_C217_ENG.docx |website=marsMediaSite |language=de |access-date=2019-03-08}}</ref>
*[[Mercedes-Benz E-Class (W213)]] (2016–2023)
*[[Mercedes-Benz C-Class (W205)]] (2015-2023)
*[[Mercedes-Benz C-Class (W206)]] (2021–)
*[[Mercedes-Benz S-Class (W223)]] (2020–)
*[[Rolls-Royce Ghost]] (2009–)<ref name=":0" />
*[[Land Rover]]
*[[Volvo XC90]] (2015–)<ref>{{Cite journal |author-last1=Fleiss |author-first1=Michael |author-last2=Müller |author-first2=Thomas M. |author-last3=Nilsson |author-first3=Martin |author-last4=Carlsson |author-first4=Jonas |date=2016-03-01 |title=Fahrzeugintegration des Antriebsstrangs bei Volvo |journal=ATZ - Automobiltechnische Zeitschrift |language=de |volume=118 |issue=3 |pages=16–21 |doi=10.1007/s35148-015-0202-7 |s2cid=183153508 |issn=2192-8800}}</ref>

== Details ==
=== Clock ===
The FlexRay system consists of a bus and [[electronic control unit]]s (ECUs). Each ECU has an independent clock. The [[clock drift]] must be not more than 0.15% from the reference clock, so the difference between the slowest and the fastest clock in the system is no greater than 0.3%.

This means that, if ECU-s is a sender and ECU-r is a receiver, then for every 300 cycles of the sender there will be between 299 and 301 cycles of the receiver. The clocks are resynchronized frequently enough to assure that this causes no problems. The clock is sent in the static segment.<ref>{{cite web |url=https://www.star-cooperation.com/en/experts-in-automotive-electronics/glossary/flexray-bus.html |title=Introduction to FlexRay |website=www.star-cooperation.com |publisher=STAR ELECTRONICS |access-date=2016-12-09 |archive-url=https://web.archive.org/web/20161220094353/https://www.star-cooperation.com/en/experts-in-automotive-electronics/glossary/flexray-bus.html |archive-date=2016-12-20 |url-status=dead}}</ref>

=== Bits on the bus ===
{| class="wikitable" style="text-align:center; float:right; clear:right; margin-left:1em"
|
{| style="border-collapse:collapse; margin:auto"
|- style="border-bottom: solid black 1px"
| 0 || 0 || 0 || 0 || 0 || 0
| style="border-left: solid black 1px" | 1
| 1 || 1 || 1 || 1 || 1 || 1 || 1 || style="border-left: solid black 1px" | 0 || 0 || 0 || 0
|-
| 0 || 0 || 0 || 0 || 0 || 0 || 0 || 0
| style="border-left: solid black 1px" | 1 || 1 || 1 || 1 || 1 || 1 || 1 || 1
| style="border-left: solid black 1px" | 0 || 0
|}
Correct averaging in case of no errors. The signal is merely delayed by 2 cycles.
|-
|
{| style="border-collapse:collapse; margin:auto"
|- style="border-bottom: solid black 1px"
| 0 || 0 || 0 || 0 || 0 || 0
| style="border-left: solid black 1px" | 1 || 1 || 1 || 1
| style="color: red" | 0 || 1 || 1 || 1
| style="border-left: solid black 1px" | 0 || 0 || 0 || 0
|-
| 0 || 0 || 0 || 0 || 0 || 0 || 0 || 0
| style="border-left: solid black 1px" | 1 || 1 || 1 || 1 || 1 || 1 || 1 || 1
| style="border-left: solid black 1px" | 0 || 0
|}
Errors near the middle of 8-cycle region are canceled.
|-
|
{| style="border-collapse:collapse; margin:auto"
|- style="border-bottom: solid black 1px"
| 0 || 0 || 0 || style="color: red" | 1 || 0
| style="border-left: solid black 1px" | 1 || 1 || 1 || 1 || 1 || 1 || 1 || 1
| style="border-left: solid black 1px" | 0 || 0 || 0 || 0
|-
| 0 || 0 || 0 || 0 || 0 || 0
| style="color: red" | 1 || style="border-left: solid black 1px" | 1 || 1 || 1 || 1 || 1 || 1 || 1 || 1
| style="border-left: solid black 1px" | 0 || 0
|}
Errors near the boundary of 8-cycle region may affect the boundary bit.
|}

At each time, only one ECU writes to the [[bus (computing)|bus]]. Each bit to be sent is held on the bus for 8 sample clock cycles.
The receiver keeps a buffer of the last 5 samples, and uses the majority of the last 5 samples as the input signal.

Single-cycle transmission errors may affect results near the boundary of the bits, but will not affect cycles in the middle of the 8-cycle region.

=== Sampled bits ===
The value of the bit is sampled in the middle of the 8-bit region.
The errors are moved to the extreme cycles, and the clock is synchronized frequently enough for the drift to be small. (Drift is smaller than 1 cycle per 300 cycles, and during transmission the clock is synchronized more than once every 300 cycles.)

=== Frame ===
All the communication is sent in the form of frames. The message consists of bytes <math>\{x_0, x_1, \dots, x_{m-1}\}</math>, packed in the following way:
* Transmission Start Signal (TSS) – bit 0
* Frame Start Signal (FSS) – bit 1
* ''m'' times:
** Byte Start Signal 0 (BSS0) – bit 1
** Byte Start Signal 1 (BSS1) – bit 0
** 0th bit of ''i''-th byte
** 1st bit of ''i''-th byte
** 2nd bit of ''i''-th byte
** ...
** 7th bit of ''i''-th byte
* Frame End Signal (FES) – bit 0
* Transmission End Signal (TES) – bit 1

If nothing is being communicated, the bus is held in state 1 (high voltage), so every receiver knows that the communication started when the voltage drops to 0.

The receiver knows when the message is complete by checking whether BSS0 (1) or FES (0) was received.

Note that 8-cycle per bit has nothing to do with bytes. Each byte takes 80 cycles to transfer. 16 for BSS0 and BSS1 and 64 for its bits.
Also note that BSS0 has value 1, and BSS1 has value 0.

=== Clock synchronization ===
Clocks are resynchronized when the voted signal changes from 1 to 0, if the receiver was in either idle state or expecting BSS1.

As synchronization is done on the voted signal, small transmission errors during synchronization that affect the boundary bits may skew the synchronization no more than 1 cycle. As there are at most 88 cycles between synchronization (BSS1, 8 bits of the last byte, FES and TES - 11 bits of 8 cycles each), and the clock drift is no larger than 1 per 300 cycles, the drift may skew the clock no more than 1 cycle. Small transmission errors during the receiving may affect only the boundary bits. So in the worst case the two middle bits are correct, and thus the sampled value is correct.

Here's an example of a particularly bad case - error during synchronization, a lost cycle due to clock drift and error in transmission.

Errors that happened in the example:
* Because of a single-bit error during synchronization, the synchronization was delayed by 1 cycle
* Receiver clock was slower than sender clock, so receiver missed one cycle (marked X). This will not happen again before the next synchronization due to limits on maximum allowable clock drift.
* Because of a single-bit error during transmission, a bit was voted wrongly near the result.
Despite so many errors, the communication was received correctly.

The green cells are sampling points. All except the first are synchronized by the 1->0 edge in the transmission fragment shown.
{| style="border-collapse: collapse"

|- style="border-bottom: solid black 1px"
! Signal to be sent
| style="text-align: center; border-left: solid black 1px" colspan="8" | 1
| style="text-align: center; border-left: solid black 1px" colspan="8" | 0
| style="text-align: center; border-left: solid black 1px" colspan="8" | 1
| style="text-align: center; border-left: solid black 1px" colspan="8" | 0
| style="text-align: center; border-left: solid black 1px" colspan="2" | 1
|- style="border-bottom: solid black 1px"
! Signal sent
| style="border-left: solid black 1px" | 1 || 1 || 1 || 1 || 1 || 1 || 1 || 1
| style="border-left: solid black 1px" | 0 || 0 || 0 || 0 || 0 || 0 || 0 || 0
| style="border-left: solid black 1px" | 1 || 1 || 1 || 1 || 1 || 1 || 1 || 1
| style="border-left: solid black 1px" | 0 || 0 || 0 || 0 || 0 || 0 || 0 || 0
| style="border-left: solid black 1px" | 1 || 1
|- style="border-bottom: solid black 1px"
! On the bus
| style="border-left: solid black 1px" | 1 || 1 || 1 || 1 || 1 || 1 || 1 || 1
| style="border-left: solid black 1px" | 0
| style="color: red" | 1 || 0 || 0 || 0 || 0 || 0 || 0
| style="border-left: solid black 1px" | 1 || 1 || 1 || 1 || 1 || 1 || 1 || 1
| style="border-left: solid black 1px" | 0 || 0 || 0 || 0 || 0 || 0
| style="color: red" | 1 || 0
| style="border-left: solid black 1px" | 1 || 1
|- style="border-bottom: solid black 1px"
! Received
| style="border-left: solid black 1px" | 1 || 1 || 1 || 1 || 1 || 1 || 1 || 1
| style="border-left: solid black 1px" | 0
| style="color: red" | 1 || 0 || 0 || 0 || 0 || 0 || 0
| style="border-left: solid black 1px" | 1 || 1 || 1 || 1 || 1 || 1
| style="background-color:gray" | X || 1
| style="border-left: solid black 1px" | 0 || 0 || 0 || 0 || 0 || 0
| style="color: red" | 1 || 0
| style="border-left: solid black 1px" | 1 || 1
|- style="border-bottom: solid black 1px"
! 5-maj voted
| || style="border-left: solid black 1px" | 1 || 1 || 1
| style="background-color: lime" | 1 || 1 || 1 || 1 || 0
| style="color: red; border-left: solid red 1px" | 1 || 0 || 0
| style="background-color: lime" | 0 || 0 || 0 || 0 || 1
| style="border-left: solid red 1px" | 1 || 1 || 1
| style="background-color: lime" | 1 || 1
| style="background-color: gray" | X || 1 || 0 || 0
| style="border-left: solid red 1px" | 0 || 0 || 0
| style="background-color: lime" | 0
| style="color: red" | 1 || 0 || 1 || 1
|}

{{Clear}}

==Development tools==
When developing and/or troubleshooting the FlexRay bus, examination of hardware signals can be very important. [[Logic analyzers]] and [[bus analyzer]]s are tools which collect, analyze, decode, store signals so people can view the high-speed waveforms at their leisure.

=== The future of FlexRay ===
Ethernet may replace FlexRay for bandwidth intensive, non-safety critical applications.<ref>{{cite web |url=http://www.eetimes.com/document.asp?doc_id=1256700 |title=Beyond FlexRay: BMW airs Ethernet plans |author-last=Hammerschmidt |author-first=Christoph |work=[[EE Times]] |date=18 June 2010 |access-date=16 February 2015}}</ref>

==See also==
* [[Controller Area Network]] (CAN)
* [[Single-pair Ethernet]] (SPE)
* [[Local Interconnect Network]] (LIN) (ISO 17987)
* [[MOST Bus|MOST]] (ISO 21806)
* [[SENT (protocol)|SENT]] (SAE J2716)

==References==
{{Reflist}}

== External links ==
* [http://zone.ni.com/devzone/cda/tut/p/id/3352 FlexRay Overview] Technical Overview of FlexRay by National Instruments
* [https://svn.ipd.kit.edu/nlrp/public/FlexRay/FlexRay%E2%84%A2%20Protocol%20Specification%20Version%203.0.1.pdf FlexRay Specification] {{Webarchive|url=https://web.archive.org/web/20160330114648/https://svn.ipd.kit.edu/nlrp/public/FlexRay/FlexRay%E2%84%A2%20Protocol%20Specification%20Version%203.0.1.pdf |date=30 March 2016 }}

{{Computer-bus}}
{{Automation protocols}}
{{Authority control}}

[[Category:Network protocols]]

FlexRay - Revision history

RS-485: Imported from Wikipedia (overwrite)