https://rs-485.com/index.php?action=history&feed=atom&title=Bus_masteringBus mastering - Revision history2026-05-03T23:29:47ZRevision history for this page on the wikiMediaWiki 1.42.3https://rs-485.com/index.php?title=Bus_mastering&diff=439&oldid=prevRS-485: Imported from Wikipedia (overwrite)2026-05-02T17:57:37Z<p>Imported from Wikipedia (overwrite)</p>
<p><b>New page</b></p><div>{{Short description|System for multiple bus access}}<br />
{{no footnotes|date=March 2013}}<br />
<br />
In [[computing]], '''bus mastering''' is a feature supported by many [[Bus (computing)|bus architecture]]s that enables a device connected to the bus to initiate [[direct memory access]] (DMA) transactions. It is also referred to as '''first-party DMA''', in contrast with [[third-party DMA]] where a system [[DMA controller]] actually does the transfer.<br />
<br />
Some types of buses allow only one device (typically the [[Central processing unit|CPU]], or its proxy) to initiate transactions. Most modern bus architectures, such as [[Peripheral Component Interconnect|PCI]], allow multiple devices to bus master because it significantly improves performance for general-purpose [[operating system]]s. Some [[real-time operating system]]s prohibit peripherals from becoming bus masters, because the scheduler can no longer arbitrate for the bus and hence cannot provide deterministic latency.<br />
<br />
While bus mastering theoretically allows one peripheral device to directly communicate with another, in practice almost all peripherals master the bus exclusively to perform DMA to [[main memory]].<br />
<br />
If multiple devices are able to master the bus, there needs to be a '''bus arbitration''' scheme to prevent multiple devices attempting to drive the bus simultaneously. A number of different schemes are used for this; for example [[SCSI]] has a fixed priority for each SCSI ID. PCI does not specify the algorithm to use, leaving it up to the implementation to set priorities.<br />
<br />
==See also==<br />
* [[Master/slave (technology)]]<br />
* [[SCSI initiator and target]]<br />
<br />
==References==<br />
* [http://www.tweak3d.net/articles/howbusmaster/ How Bus Mastering Works] - Tweak3D<br />
* [https://web.archive.org/web/20120316232747/http://bugclub.org/beginners/hardware/BUSMastering.html What is bus mastering?]- Brevard User's Group<br />
<br />
{{Computer bus}}<br />
<br />
[[Category:Computer buses]]<br />
[[Category:Motherboard]]<br />
<br />
<br />
{{compu-hardware-stub}}</div>RS-485