Editing Advanced eXtensible Interface (section)

==== Writes ====
[[File:AXI write transaction.svg|thumb|upright=2.25|Example of an AXI write transaction. The initiator drives 4 beats (AWLEN + 1<ref name="axlen" />) of 4 Bytes each starting from address 0x0 with INCR type, writing 0x10 for address 0x0, 0x11 for address 0x4, 0x12 for address 0x8 and 0x13 for address 0xc. The target returns 'OKAY' as write response for the whole transaction. Only the most relevant signals are shown here.]]

To start a write operation, the initiator has to provide both the address information and the data information.

The address information is provided over the Write address channel, in a similar manner as a read operation:
* the start address has to be provided on AWADDR
* the burst type, either FIXED, INCR or WRAP, on AWBURST (if present)
* the burst length on AWLEN (if present)
and, if present, all the optional signals.

An initiator has also to provide the data related to the specified address(es) on the Write data channel:
* the data on WDATA
* the "strobe" bits on WSTRB (if present), which conditionally mark the individual WDATA bytes as "valid" or "invalid"

Like in the read path, on the last data word, WLAST has to be asserted by the initiator.

After the completion of both the transactions, the target has to send back to the initiator the status of the write over the Write response channel, by returning the result over the BRESP signal.