Editing Advanced eXtensible Interface (section)

=== Signals ===

{| class="wikitable"
|+ Signals of the Read and Write Address channels
|-
! Signal description !! Write Address channel !! Read Address channel
|-
| Address ID, to identify multiple [[Stream (computing)|streams]] over a single [[Communication channel|channel]] || AWID || ARID
|-
| Address of the first beat of the burst || AWADDR || ARADDR
|-
| Number of beats inside the burst || AWLEN{{refn|name=axi34difference|group=nb|Different behavior between AXI3 and AXI4}} || ARLEN{{refn|name=axi34difference|group=nb}}
|-
| Size of each beat || AWSIZE || ARSIZE
|-
| Type of the burst || AWBURST || ARBURST
|-
| Lock type, to provide [[Atomicity (programming)|atomic operations]] || AWLOCK{{refn|name=axi34difference|group=nb}} || ARLOCK{{refn|name=axi34difference|group=nb}}
|-
| Memory type, how the transaction has to progress through the system || AWCACHE || ARCACHE
|-
| Protection type: [[Privilege (computing)|privilege]], security level and data/instruction access || AWPROT || ARPROT
|-
| [[Quality of service]] of the transaction || AWQOS{{refn|name=axi4only|group=nb|Available only with AXI4}} || ARQOS{{refn|name=axi4only|group=nb}}
|-
| Region identifier, to access multiple logical interfaces from a single physical one || AWREGION{{refn|name=axi4only|group=nb}} || ARREGION{{refn|name=axi4only|group=nb}}
|-
| User-defined data || AWUSER{{refn|name=axi4only|group=nb}} || ARUSER{{refn|name=axi4only|group=nb}}
|-
| <code>xVALID</code> [[Handshake (computing)|handshake]] signal || AWVALID || ARVALID
|-
| <code>xREADY</code> [[Handshake (computing)|handshake]] signal || AWREADY || ARREADY
|}

{| class="wikitable"
|+ Signals of the Read and Write Data channels
|-
! Signal description !! Write Data channel !! Read Data channel
|-
| Data ID, to identify multiple [[Stream (computing)|streams]] over a single [[Communication channel|channel]] || WID{{refn|name=axi3only|group=nb|Available only with AXI3}} || RID
|-
| Read/Write data || WDATA || RDATA
|-
| Read response, to specify the status of the current RDATA signal || || RRESP 
|-
| Byte strobe, to indicate which bytes of the WDATA signal are valid || WSTRB || 
|-
| Last beat identifier || WLAST || RLAST
|-
| User-defined data || WUSER{{refn|name=axi4only|group=nb}} || RUSER{{refn|name=axi4only|group=nb}}
|-
| <code>xVALID</code> [[Handshake (computing)|handshake]] signal || WVALID || RVALID
|-
| <code>xREADY</code> [[Handshake (computing)|handshake]] signal || WREADY || RREADY
|}

{| class="wikitable"
|+ Signals of the Write Response channel
|-
! Signal description !! Write Response channel
|-
| Write response ID, to identify multiple [[Stream (computing)|streams]] over a single [[Communication channel|channel]] || BID
|-
| Write response, to specify the status of the burst || BRESP
|-
| User-defined data || BUSER{{refn|name=axi4only|group=nb}}
|-
| <code>xVALID</code> [[Handshake (computing)|handshake]] signal || BVALID
|-
| <code>xREADY</code> [[Handshake (computing)|handshake]] signal || BREADY
|}
<ref>{{cite web |author1=Arm Holdings |title=AMBA AXI and ACE Protocol Specification |url=https://static.docs.arm.com/ihi0022/e/IHI0022E_amba_axi_and_ace_protocol_spec.pdf |website=developer.arm.com |access-date=5 July 2019 |pages=28–34 |language=en |archive-date=5 July 2019 |archive-url=https://web.archive.org/web/20190705083043/https://static.docs.arm.com/ihi0022/e/IHI0022E_amba_axi_and_ace_protocol_spec.pdf |url-status=dead }}</ref>
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