Editing Serial Peripheral Interface (section)

===Mode numbers ===
The combinations of polarity and phases are referred to by these "SPI mode" numbers with CPOL as the high order bit and CPHA as the low order bit:
{| class="wikitable"
|-
! SPI mode
! Clock polarity<br />(CPOL)
! Clock phase<br />(CPHA)
!Data is shifted out on
! Data is sampled on
|-
| 0 || 0 || 0 
|falling SCLK, and when {{Overline|SS}} activates || rising SCLK
|-
| 1 || 0 || 1 
| rising SCLK || falling SCLK
|-
| 2 || 1 || 0 
| rising SCLK, and when {{Overline|SS}} activates || falling SCLK
|-
| 3 || 1 || 1 
|falling SCLK|| rising SCLK
|}

Notes:

* Another commonly used notation represents the mode as a (CPOL, CPHA) tuple; e.g., the value '(0, 1)' would indicate CPOL=0 and CPHA=1.
* In Full Duplex operation, the master device could transmit and receive with different modes. For instance, it could transmit in Mode 0 and be receiving in Mode 1 at the same time.
* Different vendors may use different naming schemes, like CKE for clock edge or NCPHA for the inversion of CPHA.