View source for PCI-X

===PCI-X 1.0===
The PCI-X standard was developed jointly by [[IBM]], [[Hewlett-Packard|HP]], and [[Compaq]] and submitted for approval in 1998. It was an effort to codify proprietary [[Server (computing)|server]] extensions to the [[PCI local bus]] to address several shortcomings in PCI, and increase performance of high bandwidth devices, such as Gigabit Ethernet, [[Fibre Channel]], and [[SCSI|Ultra3 SCSI]] cards, and allow processors to be interconnected in [[Computer cluster|clusters]].

Intel gave only a qualified welcome to PCI-X, stressing that the next generation bus would have to be a "fundamentally new architecture".<ref>{{cite news |title=PCI-X Gang of Three challenges Intel with Future I/O |url=https://www.theregister.co.uk/1999/01/13/pcix_gang_of_three_challenges/ |date=1999-01-13 |first= John |last=Lettice |journal=The Register}}</ref> Without Intel's support, PCI-X failed to be adopted in PCs. According to Rick Merritt of the EE Times, "A falling-out between the PCI SIG and a key Intel interconnect designer who spearheaded development on the [[Accelerated Graphics Port]] caused Intel to pull out of the initial PCI-X effort".<ref>{{cite news |url=http://www.eetimes.com/document.asp?doc_id=1204479 |title=Servers gas up with 4-Gbyte/s PCI-X 2.0 spec |first=Rick |last=Merritt |date=2001-11-21 |journal=EE Times}}</ref> The PCI-X interface was however briefly adopted by Apple, for the first few generations of the [[Power Macintosh G5]].

The first PCI-X products were manufactured in 1998, such as the Adaptec AHA-3950U2B dual Ultra2 Wide SCSI controller, however at that point the PCI-X connector was merely referred to as "64-bit ready PCI" on packaging, hinting at future [[forward compatibility]]. Actual PCI-X branding only became standard later, likely coinciding with widespread availability of PCI-X equipped motherboards. When more details of PCI Express were released in August 2001, PCI SIG chairman Roger Tipley expressed his belief that "PCI-X is going to be in servers forever because it serves a certain level of functionality, and it may not be compelling to switch to 3GIO [PCI Express] for that functionality. We learned that from not being able to get rid of ISA. ISA hung around because of all of these systems that weren't high-volume parts." Tipley also announced that (at the time) the PCI SIG was planning to fold PCI Express and PCI-X 2.0 into a single work tentatively called PCI 3.0,<ref>Jerry Ascierto (8/30/2001) "[http://www.eetimes.com/document.asp?doc_id=1228264 Intel details next-generation I/O spec]", ''EE Times''</ref> but that name was eventually used for a relatively minor revision of conventional PCI.<ref>{{Cite web |url=http://www.pcisig.com/news_room/faqs/faq_pci30/pci30_faq.pdf |title=Archived copy |access-date=2013-12-16 |archive-date=2014-02-11 |archive-url=https://web.archive.org/web/20140211033021/http://www.pcisig.com/news_room/faqs/faq_pci30/pci30_faq.pdf |url-status=dead }}</ref>